In late 2007, HVVi Semiconductors, Inc., introduced the first new silicon RF power transistor structure in over a decade. The HVVFET™ (High Voltage Vertical Field Effect Transistor) is a discrete high power transistor for RF amplifier applications.  Compared to traditional LDMOS transistors, the HVVFET™ offers dramatic performance advantages, and these advantages provide the opportunity to significantly reduce system costs. With 23 U.S. and 17 foreign patents filed, the HVVFET™ represents a disruptive technology. HVVi's initial HVVFET™s  utilize a 48V operating supply and a distinctive vertical device structure that provides a clear roadmap to higher-voltage operation. With these breakthroughs, HVVi will enable new applications across wireless industries as diverse as cellular infrastructure, avionics, ISM and broadcast.

HVVFET™: The Path to Higher Operating Voltage
HVVi's focus is to create RF power with the highest operating voltage possible. In the unique device architecture of the HVVFET™, the substrate of the device is the drain of the transistor. The HVVFET™ depletes vertically into the substrate as voltage is applied to the drain. This novel device architecture approaches planar breakdown in the vertical drain region, thereby standing off the maximum voltage with the minimum Rdson (on resistance). The architecture also greatly improves device packing density and lowers parasitic capacitance.

The HVVFET™’s unique structure provides performance characteristics that improve as the device migrates to even higher operating voltages. The HVVi roadmap is to produce greater RF power through high voltage, which lowers the drain-source current of the device. This results in a smaller die size and reduced parasitic capacitance per watt. Lower capacitance supports higher-frequency operation, and lower current density leads to improved reliability.

With the HVVFET™, higher operating voltages lead to improved performance!

Market
With the unique architecture and vertical nature of the HVVFET™ transistor, large amounts of transistor periphery can be placed in a small region of silicon to maximize device packing density. HVVi’s key objective is to maximize transistor reliability while constraining the geometry of the transistor cells. The first generation  HVVFET™ leverages the novel device architecture to optimize the device for pulsed applications such as avionics and radar.   The structure advantages can also be exploited  to address high peak-to-average-ratio applications such as CDMA, W-CDMA, TD-SCDMA and OFDM systems in which high gain, efficiency and linearity are valued device attributes.

HVVFET™ Advantages

Lower system and operating costs

• More efficient, easier cooling
• Reduced part count and board space

Faster design time

• Higher impedances
• Greater stability & ruggedness

Better reliability

• Extreme ruggedness
• Better thermal management